1.
Dragomir, Voichita; Stefan, Gheorghe M.
Sparse Matrix-Vector Multiplication on a Map-Reduce Many-Core Accelerator Journal Article
In: ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY, vol. 23, no. 3, pp. 262-273, 2020, ISSN: 1453-8245.
Abstract | BibTeX | Tags: sparse matrix; matrix-vector multiplication; unstructured sparse matrix; structured sparse matrix; heterogenous computing
@article{WOS:000560566100004,
title = {Sparse Matrix-Vector Multiplication on a Map-Reduce Many-Core
Accelerator},
author = {Voichita Dragomir and Gheorghe M. Stefan},
issn = {1453-8245},
year = {2020},
date = {2020-01-01},
journal = {ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY},
volume = {23},
number = {3},
pages = {262-273},
publisher = {EDITURA ACAD ROMANE},
address = {CALEA 13 SEPTEMBRIE NR 13, SECTOR 5, BUCURESTI 050711, ROMANIA},
abstract = {Our proposal for accelerating the computation of Sparse Matrix Vector
Multiplication is a Map-Reduce Accelerator as part of a heterogenous
computer. We prove that both, structured and unstructured sparse
matrices are efficiently multiplied with a dense vector approach using a
parallel accelerator structured as a linear array of cells loop
connected, through a log-depth reduction network, with a controller. The
specific algorithms are presented and their implementation is compared
with the of-the-shelf solutions. The main advantages of our
architectural proposal, compared with the GeForce GTX 280 GPU which is
implemented in the same technological node, are: (1) it provides the
means to use 5 divided by 12x more computation out of the peak
computational power, (2) it performs the computation with 2.5 x less
energy.},
keywords = {sparse matrix; matrix-vector multiplication; unstructured sparse matrix; structured sparse matrix; heterogenous computing},
pubstate = {published},
tppubtype = {article}
}
Our proposal for accelerating the computation of Sparse Matrix Vector
Multiplication is a Map-Reduce Accelerator as part of a heterogenous
computer. We prove that both, structured and unstructured sparse
matrices are efficiently multiplied with a dense vector approach using a
parallel accelerator structured as a linear array of cells loop
connected, through a log-depth reduction network, with a controller. The
specific algorithms are presented and their implementation is compared
with the of-the-shelf solutions. The main advantages of our
architectural proposal, compared with the GeForce GTX 280 GPU which is
implemented in the same technological node, are: (1) it provides the
means to use 5 divided by 12x more computation out of the peak
computational power, (2) it performs the computation with 2.5 x less
energy.
Multiplication is a Map-Reduce Accelerator as part of a heterogenous
computer. We prove that both, structured and unstructured sparse
matrices are efficiently multiplied with a dense vector approach using a
parallel accelerator structured as a linear array of cells loop
connected, through a log-depth reduction network, with a controller. The
specific algorithms are presented and their implementation is compared
with the of-the-shelf solutions. The main advantages of our
architectural proposal, compared with the GeForce GTX 280 GPU which is
implemented in the same technological node, are: (1) it provides the
means to use 5 divided by 12x more computation out of the peak
computational power, (2) it performs the computation with 2.5 x less
energy.