1.
Gindac, Andrei; Popa, Andrei-Edward; Ulmamei, Andrei-Alexandru; Bira, Calin
Open-source SoC-based Off-the-shelf Industrial-Grade Low-Cost Logic Analyzer Journal Article
In: ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY, vol. 24, no. 1, pp. 117-126, 2021, ISSN: 1453-8245.
Abstract | BibTeX | Tags: SoC; FPGA; HLS; HDL; many channels; logic analyzer
@article{WOS:000636230100007,
title = {Open-source SoC-based Off-the-shelf Industrial-Grade Low-Cost Logic
Analyzer},
author = {Andrei Gindac and Andrei-Edward Popa and Andrei-Alexandru Ulmamei and Calin Bira},
issn = {1453-8245},
year = {2021},
date = {2021-01-01},
journal = {ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY},
volume = {24},
number = {1},
pages = {117-126},
publisher = {EDITURA ACAD ROMANE},
address = {CALEA 13 SEPTEMBRIE NR 13, SECTOR 5, BUCURESTI 050711, ROMANIA},
abstract = {This paper proposes a solution for back-to-back 200+ MHz 150-channel
data acquisition based on Xilinxs Zynq-7000 family (dual-core ARM +
Artix-class FPGA) with Linux Ubuntu rootfs and PYNQ software framework
and application running in Jupyter notebook. A comparison is made
between High Level Synthesis (HLS) and Hardware Description Language
(HDL) versions of the device (performance, power consumption). It
distinguishes itself from the state of art by providing a very good
(MSa/s * channel) / USD value, in addition to large amounts of sample
storage.},
keywords = {SoC; FPGA; HLS; HDL; many channels; logic analyzer},
pubstate = {published},
tppubtype = {article}
}
This paper proposes a solution for back-to-back 200+ MHz 150-channel
data acquisition based on Xilinxs Zynq-7000 family (dual-core ARM +
Artix-class FPGA) with Linux Ubuntu rootfs and PYNQ software framework
and application running in Jupyter notebook. A comparison is made
between High Level Synthesis (HLS) and Hardware Description Language
(HDL) versions of the device (performance, power consumption). It
distinguishes itself from the state of art by providing a very good
(MSa/s * channel) / USD value, in addition to large amounts of sample
storage.
data acquisition based on Xilinxs Zynq-7000 family (dual-core ARM +
Artix-class FPGA) with Linux Ubuntu rootfs and PYNQ software framework
and application running in Jupyter notebook. A comparison is made
between High Level Synthesis (HLS) and Hardware Description Language
(HDL) versions of the device (performance, power consumption). It
distinguishes itself from the state of art by providing a very good
(MSa/s * channel) / USD value, in addition to large amounts of sample
storage.