1.
Antonescu, Mihai; Stefan, Gheorghe M.
Multi-Function Scan Circuit for Assisting the Parallel Computational Map Pattern Journal Article
In: ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY, vol. 27, no. 1, pp. 1-18, 2024, ISSN: 1453-8245.
Abstract | Links | BibTeX | Tags: Benes network; General-Purpose Accelerator; Multi-Function Permutation circuit; Scan Circuit
@article{WOS:001203088700001,
title = {Multi-Function Scan Circuit for Assisting the Parallel Computational Map
Pattern},
author = {Mihai Antonescu and Gheorghe M. Stefan},
doi = {10.59277/ROMJIST.2024.1.01},
issn = {1453-8245},
year = {2024},
date = {2024-01-01},
journal = {ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY},
volume = {27},
number = {1},
pages = {1-18},
publisher = {EDITURA ACAD ROMANE},
address = {CALEA 13 SEPTEMBRIE NR 13, SECTOR 5, BUCURESTI 050711, ROMANIA},
abstract = {Some parallel computing patterns can be accelerated using appropriate
networks of simple circuits. We propose a solution, based on the
Benes-Waksman permutation network, which is adapted to efficiently
accelerate not only permutation, but some of the most used parallel
computational patterns such as: pack, prefix operations and reductions.
The structural context considered for deploying our circuit is the map
parallel pattern represented by an array of computational elements. The
developed network receives a vector from the map array and outputs a
vector for functions such as permute, pack, prefix sum (thus closing a
first global loop over the map array of cells). For reduction functions
(add, min, max) the network returns a scalar (thus closing a second
global loop over the map array). With these improvements, this network
adds circuit support for frequently used functions, in addition to
map-type functions performed in the array of computing elements. While
for reduction functions the frame of the permutation network can be
easily adapted, for prefix functions and for the pack function new forms
of implementation are proposed. The cells of the Benes-Waksman network
are redesigned to support the additional functionality. Some
applications are then presented to emphasize the utility of our design.},
keywords = {Benes network; General-Purpose Accelerator; Multi-Function Permutation circuit; Scan Circuit},
pubstate = {published},
tppubtype = {article}
}
Some parallel computing patterns can be accelerated using appropriate
networks of simple circuits. We propose a solution, based on the
Benes-Waksman permutation network, which is adapted to efficiently
accelerate not only permutation, but some of the most used parallel
computational patterns such as: pack, prefix operations and reductions.
The structural context considered for deploying our circuit is the map
parallel pattern represented by an array of computational elements. The
developed network receives a vector from the map array and outputs a
vector for functions such as permute, pack, prefix sum (thus closing a
first global loop over the map array of cells). For reduction functions
(add, min, max) the network returns a scalar (thus closing a second
global loop over the map array). With these improvements, this network
adds circuit support for frequently used functions, in addition to
map-type functions performed in the array of computing elements. While
for reduction functions the frame of the permutation network can be
easily adapted, for prefix functions and for the pack function new forms
of implementation are proposed. The cells of the Benes-Waksman network
are redesigned to support the additional functionality. Some
applications are then presented to emphasize the utility of our design.
networks of simple circuits. We propose a solution, based on the
Benes-Waksman permutation network, which is adapted to efficiently
accelerate not only permutation, but some of the most used parallel
computational patterns such as: pack, prefix operations and reductions.
The structural context considered for deploying our circuit is the map
parallel pattern represented by an array of computational elements. The
developed network receives a vector from the map array and outputs a
vector for functions such as permute, pack, prefix sum (thus closing a
first global loop over the map array of cells). For reduction functions
(add, min, max) the network returns a scalar (thus closing a second
global loop over the map array). With these improvements, this network
adds circuit support for frequently used functions, in addition to
map-type functions performed in the array of computing elements. While
for reduction functions the frame of the permutation network can be
easily adapted, for prefix functions and for the pack function new forms
of implementation are proposed. The cells of the Benes-Waksman network
are redesigned to support the additional functionality. Some
applications are then presented to emphasize the utility of our design.