1.
Maliţa, Mihaela; Popescu, George Vlăduţ; Ştefan, Gheorghe M.
Pseudo-Reconfigurable Heterogeneous Solution for Accelerating Spectral Clustering Proceedings Article
In: 2020 IEEE International Conference on Big Data (Big Data), pp. 5138-5145, 2020.
Abstract | Links | BibTeX | Tags: Clustering algorithms;Machine learning;Linear algebra;Heterogeneous networks;Registers;Acceleration;Field programmable gate arrays;Spectral clustering;parallel algorithm;parallel computing;accelerator;heterogeneous computing;pseudo-reconfigurable computing
@inproceedings{9378150,
title = {Pseudo-Reconfigurable Heterogeneous Solution for Accelerating Spectral Clustering},
author = {Mihaela Maliţa and George Vlăduţ Popescu and Gheorghe M. Ştefan},
doi = {10.1109/BigData50022.2020.9378150},
year = {2020},
date = {2020-12-01},
booktitle = {2020 IEEE International Conference on Big Data (Big Data)},
pages = {5138-5145},
abstract = {Spectral clustering is a Machine Learning technique intensively used in Big Data applications. It makes extensive use of linear algebra. This article introduces the concept of MapReduce Accelerator (MRA) as the reconfigurable part of a heterogeneous computing system. Although the accelerator we propose is a general purpose one, it has some specific features related to the targeted application. This is possible due to the pseudo-reconfigurable environment which deploys in FPGA a parameterizable programmable accelerator. The main specific characteristics of the accelerator are proposed as a result of the analysis performed on the spectral clustering algorithms. The architecture is described and the spectral clustering algorithms are evaluated. The proposed solution is compared, in terms of computing performance and energy consumption, with other solutions published in the literature. The increase in computing performance is accompanied by a 3-5 times reduction in energy consumed. The accelerator is a linear array of cells controlled by a sequencer loop closed through a reduction network. Each cell is a simple, accumulator-based execution unit with a big two-port register file. The reduction network is a log-depth pipelined circuit performing few reduction functions such as add, min, max. The experimental system is a PYNQ-Z2 board equipped with Zinq 7020 SoC; it is used to implement and evaluate the acceleration provided by an 128-cell MRA.},
keywords = {Clustering algorithms;Machine learning;Linear algebra;Heterogeneous networks;Registers;Acceleration;Field programmable gate arrays;Spectral clustering;parallel algorithm;parallel computing;accelerator;heterogeneous computing;pseudo-reconfigurable computing},
pubstate = {published},
tppubtype = {inproceedings}
}
Spectral clustering is a Machine Learning technique intensively used in Big Data applications. It makes extensive use of linear algebra. This article introduces the concept of MapReduce Accelerator (MRA) as the reconfigurable part of a heterogeneous computing system. Although the accelerator we propose is a general purpose one, it has some specific features related to the targeted application. This is possible due to the pseudo-reconfigurable environment which deploys in FPGA a parameterizable programmable accelerator. The main specific characteristics of the accelerator are proposed as a result of the analysis performed on the spectral clustering algorithms. The architecture is described and the spectral clustering algorithms are evaluated. The proposed solution is compared, in terms of computing performance and energy consumption, with other solutions published in the literature. The increase in computing performance is accompanied by a 3-5 times reduction in energy consumed. The accelerator is a linear array of cells controlled by a sequencer loop closed through a reduction network. Each cell is a simple, accumulator-based execution unit with a big two-port register file. The reduction network is a log-depth pipelined circuit performing few reduction functions such as add, min, max. The experimental system is a PYNQ-Z2 board equipped with Zinq 7020 SoC; it is used to implement and evaluate the acceleration provided by an 128-cell MRA.