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Pietricică, Andreea-Cătălina; Antonescu, Mihai; Popescu, George-Vlăduț
Evaluation of AES Cryptographic Algorithm on a General-Purpose Map-Scan Accelerator Proceedings Article
In: 2023 International Semiconductor Conference (CAS), pp. 99-102, 2023, ISSN: 2377-0678.
Abstract | Links | BibTeX | Tags: Couplings;Microprocessors;Computer architecture;Parallel processing;Throughput;Hardware;Encryption;AES;ECB;CTR;Heterogeneous computing system;Map-Reduce;Map-Scan;Accelerator
@inproceedings{10303705,
title = {Evaluation of AES Cryptographic Algorithm on a General-Purpose Map-Scan Accelerator},
author = {Andreea-Cătălina Pietricică and Mihai Antonescu and George-Vlăduț Popescu},
doi = {10.1109/CAS59036.2023.10303705},
issn = {2377-0678},
year = {2023},
date = {2023-10-01},
booktitle = {2023 International Semiconductor Conference (CAS)},
pages = {99-102},
abstract = {As one of the most widely used encryption standards, AES must be implemented taking encryption speed into consideration. This paper presents the evaluation of the AES algorithm on a general-purpose Map-Scan Accelerator. AES proves well suited to a Map style of parallelism, with each computational cell processing one block of data. ECB and CTR modes are implemented and evaluated for key sizes of 128, 192, and 256.},
keywords = {Couplings;Microprocessors;Computer architecture;Parallel processing;Throughput;Hardware;Encryption;AES;ECB;CTR;Heterogeneous computing system;Map-Reduce;Map-Scan;Accelerator},
pubstate = {published},
tppubtype = {inproceedings}
}
As one of the most widely used encryption standards, AES must be implemented taking encryption speed into consideration. This paper presents the evaluation of the AES algorithm on a general-purpose Map-Scan Accelerator. AES proves well suited to a Map style of parallelism, with each computational cell processing one block of data. ECB and CTR modes are implemented and evaluated for key sizes of 128, 192, and 256.