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Margineanu, Teodor; Enescu, Horia-Razvan; Vasile, Costin-Emanuel; Enachescu, Marius
Cryptography Core Implementation Starting From Open-Source RTL Proceedings Article
In: 2024 International Semiconductor Conference (CAS), pp. 253-256, 2024, ISSN: 2377-0678.
Abstract | Links | BibTeX | Tags: Industries;Protocols;Encryption;IP networks;AES;open-source;RTL;UVM;physical design
@inproceedings{10736862,
title = {Cryptography Core Implementation Starting From Open-Source RTL},
author = {Teodor Margineanu and Horia-Razvan Enescu and Costin-Emanuel Vasile and Marius Enachescu},
doi = {10.1109/CAS62834.2024.10736862},
issn = {2377-0678},
year = {2024},
date = {2024-10-01},
booktitle = {2024 International Semiconductor Conference (CAS)},
pages = {253-256},
abstract = {The chip shortage and demand for skilled workers have driven the adoption of open-source tools and IP reuse in the industry. This paper presents the design and implementation of a low power, small area IC encryption core, based on the AES protocol. Starting from open-source RTL modules, such as the CPU, the AES and the UART, three buffers and a peripheral adapter have been designed to enable the entire crypto-system integration (AESCRYPT), hence enabling the system to serve as a central hub for data encrypt within a larger framework. By developing the UVM-based verification environment, the AESCRYPT system was verified before and after implementation in a 65nm technology, demonstrating its full functionality.},
keywords = {Industries;Protocols;Encryption;IP networks;AES;open-source;RTL;UVM;physical design},
pubstate = {published},
tppubtype = {inproceedings}
}
The chip shortage and demand for skilled workers have driven the adoption of open-source tools and IP reuse in the industry. This paper presents the design and implementation of a low power, small area IC encryption core, based on the AES protocol. Starting from open-source RTL modules, such as the CPU, the AES and the UART, three buffers and a peripheral adapter have been designed to enable the entire crypto-system integration (AESCRYPT), hence enabling the system to serve as a central hub for data encrypt within a larger framework. By developing the UVM-based verification environment, the AESCRYPT system was verified before and after implementation in a 65nm technology, demonstrating its full functionality.