Publications

@inproceedings{WOS:001361909500053,

title = {TEA/XTEA brute-force cracker for CPU, GPU and FPGA},

author = {Costin-Emanuel Vasile and Calin Bira and George Vladut Popescu},

editor = {G Brezeanu and O Buiu and ML Ciurea and D Cristea and MA Dinescu and D Dobrescu and M Dragoman and C Kusko and C Moldovan and A Muller and R Muller and D Neculoiu},

doi = {10.1109/CAS62834.2024.10736715},

issn = {1545-827X},

year  = {2024},

date = {2024-01-01},

booktitle = {2024 INTERNATIONAL SEMICONDUCTOR CONFERENCE, CAS 2024},

pages = {249-252},

publisher = {IEEE COMPUTER SOC},

address = {10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA},

organization = {IMT Bucharest, Natl Inst Res & Dev Microtechnologies; Minist Res, 

 Innovat, & Digitalizat Romania; IEEE Electron Devices Soc; IEEE; 

 NANOTEAM; RONEXPRIM; HISTERESIS; SPECS Surface Nano Anal GmbH; 

 Continental Automot Romania SRL; Asociatia Pentru Educatie 

 Antreprenoriala; Carl Zeiss Instruments SRL; AMS 2000 Trading Impex S R 

 L & Rigaku Corp; Schaefer SE Europe srl; RIANA Horizon Europe Project},

series = {International Semiconductor Conference},

abstract = {This work presents a study comparing Tiny Encryption Algorithm 

 (TEA/XTEA) brute-force cracker C++ implementations on FPGA, GPU and CPU. 

 Our HLS FPGA implementation outperformed by at least 2.5x core-per-core 

 state-of-the art for TEA and 20x for XTEA. For a similar 75W TDP, our 

 FPGA implementation outperformed our GPU implementation by at least 3x.},

note = {47th International Semiconductor Conference (CAS), Sinaia, ROMANIA, OCT 

 09-11, 2024},

keywords = {TEA; XTEA; brute-force cracker; FPGA; GPU; CPU},

pubstate = {published},

tppubtype = {inproceedings}

}