1.
Vasile, Costin-Emanuel; Bîră, Călin; Popescu, George-Vlădut
TEA/XTEA Brute-Force Cracker for CPU, GPU and FPGA Proceedings Article
In: 2024 International Semiconductor Conference (CAS), pp. 249-252, 2024, ISSN: 2377-0678.
Abstract | Links | BibTeX | Tags: Art;Graphics processing units;C++ languages;Parallel processing;Benchmark testing;Encryption;Kernel;Field programmable gate arrays;TEA;XTEA;brute-force cracker;FPGA;GPU;CPU
@inproceedings{10736715,
title = {TEA/XTEA Brute-Force Cracker for CPU, GPU and FPGA},
author = {Costin-Emanuel Vasile and Călin Bîră and George-Vlădut Popescu},
doi = {10.1109/CAS62834.2024.10736715},
issn = {2377-0678},
year = {2024},
date = {2024-10-01},
booktitle = {2024 International Semiconductor Conference (CAS)},
pages = {249-252},
abstract = {This work presents a study comparing Tiny Encryption Algorithm (TEA/XTEA) brute-force cracker C++ implementations on FPGA, GPU and CPU. Our HLS FPGA implementation outperformed by at least 2.5x core-per-core state-of-the art for TEA and 20x for XTEA. For a similar 75W TDP, our FPGA implementation outperformed our GPU implementation by at least 3x.},
keywords = {Art;Graphics processing units;C++ languages;Parallel processing;Benchmark testing;Encryption;Kernel;Field programmable gate arrays;TEA;XTEA;brute-force cracker;FPGA;GPU;CPU},
pubstate = {published},
tppubtype = {inproceedings}
}
This work presents a study comparing Tiny Encryption Algorithm (TEA/XTEA) brute-force cracker C++ implementations on FPGA, GPU and CPU. Our HLS FPGA implementation outperformed by at least 2.5x core-per-core state-of-the art for TEA and 20x for XTEA. For a similar 75W TDP, our FPGA implementation outperformed our GPU implementation by at least 3x.