Publications

@inproceedings{699446,

title = {Connex memories and rewriting systems},

author = {G. Stefan and R. Benea},

doi = {10.1109/MELCON.1998.699446},

year  = {1998},

date = {1998-05-01},

booktitle = {MELECON '98. 9th Mediterranean Electrotechnical Conference. Proceedings (Cat. No.98CH36056)},

volume = {2},

pages = {1299-1303 vol.2},

abstract = {The aim of this paper is to offer a theoretical framework for our concept of connex memory, initially introduced as a proposal for an efficient implementation of list-oriented programming languages. The Markov Algorithms and the Lindenmeyer Grammars offer the theoretical support for the main connex memory applications: the rewriting systems. We also introduce a parallel version (with multiple access) for the function of the connex memory. We call eco-chip a two dimensional cellular automaton used as support for a multiple accessed connex memory.},

keywords = {Gold;Computer architecture;Petroleum},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{651329,

title = {Bi-thread microcontroller as digital signal processor},

author = {D. Stefan and G. Stefan},

doi = {10.1109/SMICND.1997.651329},

year  = {1997},

date = {1997-10-01},

booktitle = {1997 International Semiconductor Conference 20th Edition. CAS '97 Proceedings},

volume = {2},

pages = {585-588 vol.2},

abstract = {A bi-thread pipeline RISC microcontroller working together with a simple but efficient arithmetic coprocessor is proposed as digital signal processor. The structure has a Dual Architecture in which the main thread is used to manage the interfacing process and to run the algorithm and the slave thread is used only to control the "hard" computation in the arithmetic coprocessor that performs the sum of products. For coprocessor we have a sequential machine with a good mean working time. The paper presents the machine architecture and the associated organisation.},

keywords = {Microcontrollers;Digital signal processors;Coprocessors;Computer architecture;Yarn;Pipelines;Reduced instruction set computing;Digital arithmetic;Signal processing algorithms;Computer interfaces},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{651332,

title = {Hardware version for two-dimensional cellular automata},

author = {M. Dascalu and E. Franti and Z. Hascsi},

doi = {10.1109/SMICND.1997.651332},

year  = {1997},

date = {1997-10-01},

booktitle = {1997 International Semiconductor Conference 20th Edition. CAS '97 Proceedings},

volume = {2},

pages = {597-600 vol.2},

abstract = {In this paper we propose a hardware version for two-dimensional cellular automata. Since cellular automata are parallel systems containing a large number of simple processing elements, their hardware version is necessary for their real-time study and applications. A cellular automata chip is described both at the architectural and cell level. The paper outlines the main functions of the cellular automata chip and describes how they operate. We also present some quantitative aspects that determine the chip dimension. The chip can be succesfully used for experiments with large CA implying long-time evolution.},

keywords = {Hardware;Concurrent computing;Computational modeling;Lattices;Research and development;Real time systems;Mathematical model;Automata;High performance computing;Clocks},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{592300,

title = {The splicing mechanism and the Connex memory},

author = {G. Stefan and M. Malita},

doi = {10.1109/ICEC.1997.592300},

year  = {1997},

date = {1997-04-01},

booktitle = {Proceedings of 1997 IEEE International Conference on Evolutionary Computation (ICEC '97)},

pages = {225-229},

abstract = {Presents the main ideas concerning the implementation of a molecular mechanism in solid-state circuits: the splicing operation. The physical support for this operation is the Connex memory circuit (Stefan, 1986, 1995). Observing the similarities between a DNA computing-based mechanism and this new type of memory, we make a proposal to implement fine-grain computational parallelism on silicon. We promote this solution because a pure biological process is very hard to interface with machines in today's technologies. We make also evaluations of the complexity of our proposed machine.},

keywords = {Splicing;DNA computing;Solid state circuits;Silicon;Biology computing;Parallel processing;Magnetic heads;Automata;Mathematics;Concurrent computing},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{557330,

title = {High-level synthesis of an enhanced Connex memory},

author = {Z. Hascsi and B. Mitu and M. Petre and G. Stefan},

doi = {10.1109/SMICND.1996.557330},

year  = {1996},

date = {1996-10-01},

booktitle = {1996 International Semiconductor Conference. 19th Edition. CAS'96 Proceedings},

volume = {1},

pages = {163-166 vol.1},

abstract = {Architectural deficiencies in symbolic processing systems are generated by the lack of an appropriate implementation of their memory functions. There are many well-defined memory functions, but there isn't yet an adequate structural implementation for any of them. The main memory functions are usually software implemented as data structures, using RAM as hardware support, but having low performance in applications because all implementations rely on sequential mechanisms. The Connex Memory (CM), involves a base-level structural parallelism that would increase the performance in tree/list processing. This paper is concerned with the synthesis of an enhanced version of CM. Specific applications of the CM include list processing, set operations, string matching and Prolog-like computation.},

keywords = {High level synthesis;Switches;Random access memory;Software performance;Data structures;Read-write memory;Hardware;Application software;Parallel processing;Computer aided manufacturing},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{5468559,

title = {The Connex Content Addressable Memory (C2AM)},

author = {Zoltan Hascsi and Gheorghe Stefan},

year  = {1995},

date = {1995-09-01},

booktitle = {ESSCIRC '95: Twenty-first European Solid-State Circuits Conference},

pages = {422-425},

abstract = {We will describe in brief the principles of the connex memory, and we will sketch the connex memory's structure. We will regard it as an associative memory, pointing some advantages over the classic CAM structures.},

keywords = {Associative memory;Computer aided manufacturing;CADCAM;Data structures;Read-write memory;Shift registers;Layout;Automata},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{162008,

title = {Memory management unit-a new principle for LRU implementation},

author = {G. Stefan and F. Draghici},

doi = {10.1109/MELCON.1991.162008},

year  = {1991},

date = {1991-05-01},

booktitle = {[1991 Proceedings] 6th Mediterranean Electrotechnical Conference},

pages = {989-992 vol.2},

abstract = {A new principle is presented for a memory management unit (MMU) which contains a new circuit for LRU (least recently used) implementation. A MMU has been chosen for study. It works with a 24-b address processor for which it facilitates access to a virtual memory (VM) of 16 Mwords, available on a disk, through the assistance of a paginated dynamic primary memory (PM) of 1 Mword, which keeps the most recently used (MRU) pages.<>},

keywords = {Memory management;Clocks;Automatic control;Cache memory;Strontium;Shift registers;Logic circuits},

pubstate = {published},

tppubtype = {inproceedings}

}